EP20K1000EFC672-2X

Programmable Logic Device, BGA, 51,840 logic elements, -0.5 to 3.6 V supply voltage

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PartNumber:: EP20K1000EFC672-2X

Brand:: Altera Corporation - ALTR | Pack: BGA | D/C: 03+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
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Products Upload time: 2011-07-30

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Product Summary

The EP20K1000EFC672-2X is the first PLD designed with the MultiCore architecture, which combines the strengths of LUT-based and productterm-based devices with an enhanced memory structure. LUT-based logic provides optimized performance and efficiency for data-path, registerintensive, mathematical, or digital signal processing (DSP) designs. Product-term-based logic is optimized for complex combinatorial paths, such as complex state machines. LUT- and product-term-based logic combined with memory functions and a wide variety of MegaCore and AMPP functions make the EP20K1000EFC672-2X device architecture uniquely suited for system-on-a-programmable-chip designs. Applications historically requiring a combination of LUT-, product-term-, and memory-based devices can now be integrated into one EP20K1000EFC672-2X device.

Parametrics

EP20K1000EFC672-2X absolute maximum ratings: (1)VCCINT Supply voltage With respect to ground: –0.5 to 3.6 V; (2)VCCIO: –0.5 to 4.6 V; (3)VI DC input voltage: –2.0 to 5.75 V; (4)IOUT DC output current, per pin: –25 to 25 mA; (5)TSTG Storage temperature: –65 to 150 ℃; (6)TAMB Ambient temperature: –65 to 135 ℃; (7)TJ Junction temperature PQFP, RQFP, TQFP, and BGA packages: 135 ℃; (8)Ceramic PGA packages: 150 ℃.

Features

EP20K1000EFC672-2X features: (1)MultiCore architecture integrating look-up table (LUT) logic, product-term logic, and embedded memory; (2)LUT logic used for register-intensive functions; (3)Embedded system block (ESB) used to implement memory functions, including first-in first-out (FIFO) buffers, dual-port RAM, and content-addressable memory (CAM); (4)ESB implementation of product-term logic used for combinatorial-intensive functions; (5)30,000 to 1.5 million typical gates; (6)Up to 51,840 logic elements (LEs); (7)Up to 442,368 RAM bits that can be used without reducing available logic; (8)Up to 3,456 product-term-based macrocells.